Unit 1: Number Systems, Signed Arithmetic, and Binary Codes
1. Introduction: Digital Systems and Information Representation
In modern electronics and computer architecture, information processing relies on digital systems—circuits and architectures that operate on discrete, quantized physical variables rather than continuously varying analog signals.
CODEAnalog Continuous Waveform Digital Quantized Waveform +V | _.-'''-._ +V | +------+ +------+ | .' '. | | | | | 0V +--'-------------'-.----------> t 0V +----+ +------+ +----> t | '. .' | -V | '-' -V | (Infinite continuum of values) (Discrete binary logic states: 0 & 1)
1.1 Advantages of Digital Over Analog Systems
- High Noise Immunity: Digital signals map voltages to wide discrete noise margins (e.g., in standard 5V TTL, any voltage between and is interpreted unambiguously as logic
1, while to is logic0). Minor electrical fluctuations, crosstalk, and thermal noise do not alter the interpreted logic value. - Deterministic Programmability and Automation: Digital processors execute software-defined algorithmic sequences with bit-exact reproducibility.
- High Integration Density and Scaling: Billions of complementary MOS (CMOS) transistors can be integrated onto a single silicon die without cascading drift or cumulative distortion.
- Error Detection and Correction: Digital information can be augmented with parity bits, checksums, and Hamming codes to detect and correct transmission or storage errors dynamically.
2. Positional Number Systems and Radix Representation
A positional number system represents a numerical magnitude as a weighted linear combination of digits, where the position of each digit determines its weight as a power of the radix (or base) .
2.1 Generalized Radix-r Polynomial Form
Any real number represented with base can be expressed in generalized polynomial notation:
where:
- is an integer representing the radix/base.
- are allowed digits in the set .
- The radix point separates the integer part from the fractional part.
- is the number of integer digits, and is the number of fractional digits.
The equivalent decimal quantitative value is obtained by expanding the sum:
CODE+-------------------------------------------------------------------------------------------------+ | Standard Positional Number Systems | +-------------+-------+-----------------------------+---------------------------------------------+ | System Name | Base | Permitted Digit Set | Primary Engineering Domain | +-------------+-------+-----------------------------+---------------------------------------------+ | Binary | r = 2 | {0, 1} | Fundamental semiconductor logic, ALUs, RAM | | Octal | r = 8 | {0, 1, 2, 3, 4, 5, 6, 7} | Compact binary shorthand (Unix permissions) | | Decimal | r = 10| {0, 1, 2, 3, 4, 5, 6, 7, 8, 9} Human arithmetic, user-facing displays | | Hexadecimal | r = 16| {0-9, A, B, C, D, E, F} | Byte-aligned machine code, memory addresses | +-------------+-------+-----------------------------+---------------------------------------------+
In hexadecimal notation, decimal values from 10 to 15 are denoted by letters:
3. Systematic Base Conversion Algorithms
Conversion between arbitrary number systems is a fundamental operation in digital computer interfaces and memory decoders.
CODE+----------------------------------------------+ | Decimal System | +----------------------------------------------+ ^ | | ^ Polynomial | | Successive | | Polynomial Evaluation | | Division/Mult | | Evaluation | v v | +---------------+ +-------------------+ | Binary (r=2) |<-------->| Hexadecimal (r=16)| +---------------+ 4-bit +-------------------+ ^ Grouping | 3-bit v Grouping +---------------+ | Octal (r=8) | +---------------+
3.1 Decimal to Base-r Conversion
A decimal number with both integer and fractional components must be converted in two separate algorithmic steps:
-
Integer Part (Successive Division Algorithm):
- Divide the integer decimal value repeatedly by the target radix .
- Record the integer quotient and the remainder .
- Terminate when the quotient reaches zero.
- The remainders read from bottom to top (most recent remainder is the Most Significant Digit (MSD); first remainder is the Least Significant Digit (LSD)).
-
Fractional Part (Successive Multiplication Algorithm):
- Multiply the fractional part repeatedly by the target radix .
- Extract the resulting integer part as the next fractional digit .
- Continue multiplying the remaining fractional component by until the fraction becomes zero or the desired bit precision is reached.
- The digits are read in sequential order from top to bottom (first extracted integer is , highest-weight fractional position).
Concrete Example: Convert to Binary
-
Integer Conversion ():
- remainder (LSD)
- remainder
- remainder
- remainder
- remainder
- remainder
- remainder
- remainder (MSD)
- Result:
-
Fractional Conversion ():
- , fraction remains
- , fraction remains
- , fraction remains (Terminates)
- Result:
-
Combined Result:
3.2 Power-of-Two Conversions (Binary, Octal, Hexadecimal)
Because and , conversions between Binary, Octal, and Hexadecimal do not require base-10 arithmetic; they are performed by direct bit grouping:
CODE+-------------------------------------------------------------------------------------------------+ | Direct Bit Grouping Equivalence | +---------+--------------------+---------+--------------------+---------+-------------------------+ | Octal | Binary (3 bits) | Hex | Binary (4 bits) | Hex | Binary (4 bits) | +---------+--------------------+---------+--------------------+---------+-------------------------+ | 0 | 000 | 0 | 0000 | 8 | 1000 | | 1 | 001 | 1 | 0001 | 9 | 1001 | | 2 | 010 | 2 | 0010 | A (10) | 1010 | | 3 | 011 | 3 | 0011 | B (11) | 1011 | | 4 | 100 | 4 | 0100 | C (12) | 1100 | | 5 | 101 | 5 | 0101 | D (13) | 1101 | | 6 | 110 | 6 | 0110 | E (14) | 1110 | | 7 | 111 | 7 | 0111 | F (15) | 1111 | +---------+--------------------+---------+--------------------+---------+-------------------------+
- Binary to Hexadecimal: Group bits into sets of 4, radiating outward from the binary point (leftward for integer, rightward for fraction), appending leading or trailing zeros as necessary. Replace each 4-bit nibble with its hexadecimal character.
- Example: .
4. Binary Arithmetic Operations
Binary arithmetic forms the operational core of the Arithmetic Logic Unit (ALU).
CODEBinary Addition Rules Binary Subtraction Rules Binary Multiplication Rules 0 + 0 = 0 (Carry 0) 0 - 0 = 0 (Borrow 0) 0 x 0 = 0 0 + 1 = 1 (Carry 0) 1 - 0 = 1 (Borrow 0) 0 x 1 = 0 1 + 0 = 1 (Carry 0) 1 - 1 = 0 (Borrow 0) 1 x 0 = 0 1 + 1 = 0 (Carry 1) 0 - 1 = 1 (Borrow 1) 1 x 1 = 1 1 + 1 + 1 = 1 (Carry 1)
In binary multiplication, the product of two -bit integers produces a result of at most bits, implemented via successive shift-and-add hardware registers.
5. Complements and Signed Number Systems
Digital circuits process both positive and negative integers. Rather than engineering separate hardware subtraction circuits, modern computers use complements to transform subtraction into addition:
5.1 The Two Fundamental Complement Definitions
For any base- system with integer digits:
-
Radix Complement ('s Complement):
- In base 10: 10's complement .
- In base 2: 2's complement .
-
Diminished Radix Complement ('s Complement):
- In base 10: 9's complement (subtract each digit from 9).
- In base 2: 1's complement (invert all bits: ).
Crucial Relationship:
5.2 Signed Binary Formats in Hardware
When representing signed integers in -bit words, the most significant bit (MSB) serves as the sign bit:
CODE+-------------------------------------------------------------------------------------------------+ | Comparison of n-bit Signed Formats | +----------------------+--------------------+--------------------+--------------------------------+ | Representation | Dynamic Range | Zero Representation| Arithmetic Hardware Complexity | +----------------------+--------------------+--------------------+--------------------------------+ | Signed Magnitude | [ -(2^(n-1) - 1), | Two zeros: +0 (000)| Separate adder & subtractor; | | | +(2^(n-1) - 1) ] | -0 (100)| complex sign comparison logic | +----------------------+--------------------+--------------------+--------------------------------+ | Signed 1's Complement| [ -(2^(n-1) - 1), | Two zeros: +0 (000)| End-around carry addition; | | | +(2^(n-1) - 1) ] | -0 (111)| dual zero complicates logic | +----------------------+--------------------+--------------------+--------------------------------+ | Signed 2's Complement| [ -2^(n-1), | Unique zero: | Single standard binary adder; | | | +(2^(n-1) - 1) ] | 0 (000...0) | subtraction is simple A + (~B+1)| +----------------------+--------------------+--------------------+--------------------------------+
CODESigned 2's Complement 4-bit Number Wheel 0000 (0) 1111 (-1) 0001 (+1) 1110 (-2) 0010 (+2) 1101 (-3) 0011 (+3) 1100 (-4) 0100 (+4) 1011 (-5) 0101 (+5) 1010 (-6) 0110 (+6) 1001 (-7) 0111 (+7) 1000 (-8) (Notice seamless wrap-around and unique zero)
5.3 2's Complement Subtraction and Overflow Conditions
To compute using -bit 2's complement:
- Form the 2's complement of , denoted .
- Compute .
- If an end-carry occurs past the -th bit, discard it. The result is mathematically correct.
Arithmetic Overflow Detection
Overflow occurs when an arithmetic operation produces a result that exceeds the representable range of the -bit register.
- Rule 1 (Sign Rule): Overflow can occur only when adding two operands of the same sign:
- Positive Positive yielding Negative Overflow
- Negative Negative yielding Positive Overflow
- Adding operands of opposite signs can never overflow.
- Rule 2 (Carry Rule for ALUs):
where is the carry out of the MSB sign position, and is the carry into the MSB sign position. If , an overflow has occurred.
6. Real Number Representation: Fixed-Point and IEEE 754 Floating-Point
6.1 Fixed-Point Representation
In fixed-point systems, a binary word of length allocates a fixed number of bits to the integer magnitude and bits to the fractional fraction.
- Resolution (weight of LSB): .
- Trade-off: Hardware implementation is trivial (identical to integer ALUs), but dynamic range is severely constrained.
6.2 IEEE 754 Floating-Point Architecture
To represent astronomical ranges (from sub-atomic dimensions to cosmic distances), the IEEE 754 standard defines floating-point numbers in normalized scientific form:
CODEIEEE 754 Single-Precision (32-bit Float) Format 1 bit 8 bits 23 bits +------+------------------------+-------------------------------------------------------+ | S | Exponent (E) | Mantissa (M) | +------+------------------------+-------------------------------------------------------+ Bit 31 Bit 30 Bit 23 Bit 22 Bit 0 (Sign) (Biased, Bias = 127) (Fractional significand bits)
CODEIEEE 754 Double-Precision (64-bit Double) Format 1 bit 11 bits 52 bits +------+-----------------------------+--------------------------------------------------+ | S | Exponent (E) | Mantissa (M) | +------+-----------------------------+--------------------------------------------------+ Bit 63 Bit 62 Bit 52 Bit 51 Bit 0 (Sign) (Biased, Bias = 1023) (Fractional significand bits)
CODE+-------------------------------------------------------------------------------------------------+ | Special IEEE 754 Floating-Point Values | +--------------------------+-----------------------+--------------------+-------------------------+ | Condition Category | Exponent Field (E) | Mantissa Field (M) | Numerical Meaning | +--------------------------+-----------------------+--------------------+-------------------------+ | Zero (+/- 0) | All zeros (0x00) | All zeros (M = 0) | Exactly 0.0 | | Subnormal Numbers | All zeros (0x00) | Non-zero (M != 0) | (-1)^S * 0.M * 2^(-126) | | Normalized Numbers | 0x01 to 0xFE (1..254) | Any value | (-1)^S * 1.M * 2^(E-127)| | Infinity (+/- oo) | All ones (0xFF) | All zeros (M = 0) | Division by zero | | Not-a-Number (NaN) | All ones (0xFF) | Non-zero (M != 0) | Invalid (e.g., 0/0, sqrt(-1))| +--------------------------+-----------------------+--------------------+-------------------------+
Step-by-Step Example: Encode Decimal into IEEE 754 Single-Precision
- Determine Sign Bit: Number is negative .
- Convert to Pure Binary:
- Normalize to Scientific Notation:
- Determine Mantissa ():
- The leading
1.is implied (hidden bit). - (padded with zeros to 23 bits).
- The leading
- Compute Biased Exponent ():
- Actual exponent .
- .
- Assemble the 32-bit Word:
- Sign ():
1 - Exponent ():
10000011 - Mantissa ():
10100110000000000000000 - Word:
1 10000011 10100110000000000000000 - Hexadecimal Representation:
0xC1D30000
- Sign ():
7. Binary Codes for Digital Systems
Binary codes map numeric digits and alphanumeric characters into unique binary sequences tailored for specific computational, physical, or transmission environments.
7.1 Weighted and Non-Weighted Numeric Codes
In a weighted code, each bit position has an assigned numerical weight . The decimal value of the code word is:
CODE+-------------------------------------------------------------------------------------------------+ | Numeric BCD and Decimal Code Comparison | +---------+--------------------+--------------------+--------------------+------------------------+ | Decimal | BCD 8421 (Weighted)| 2421 (Self-Comp.) | 5421 (Weighted) | Excess-3 (Non-Weighted)| +---------+--------------------+--------------------+--------------------+------------------------+ | 0 | 0000 | 0000 | 0000 | 0011 | | 1 | 0001 | 0001 | 0001 | 0100 | | 2 | 0010 | 0010 | 0010 | 0101 | | 3 | 0011 | 0011 | 0011 | 0110 | | 4 | 0100 | 0100 | 0100 | 0111 | | 5 | 0101 | 1011 | 1000 | 1000 | | 6 | 0110 | 1100 | 1001 | 1001 | | 7 | 0111 | 1101 | 1010 | 1010 | | 8 | 1000 | 1110 | 1011 | 1011 | | 9 | 1001 | 1111 | 1100 | 1100 | +---------+--------------------+--------------------+--------------------+------------------------+
Self-Complementing Codes
A code is self-complementing if the 1's complement of the binary code word for decimal digit directly yields the code word for its 9's complement .
- Examples: 2421 Code and Excess-3 Code.
- Example in Excess-3: Code for is
0101. Inverting all bits gives1010, which is the Excess-3 code for (). This drastically simplifies decimal subtraction in ALUs.
7.2 Unit-Distance / Reflective Codes: The Gray Code
In a unit-distance code, successive numbers differ by exactly one bit. The standard binary system lacks this property (e.g., transitioning from (0111) to (1000) alters all 4 bits simultaneously, creating transient erroneous readouts due to mechanical and electrical delays).
CODEBinary Transition (0111 -> 1000) Gray Code Transition (0100 -> 1100) Bit 3: 0 ----> 1 Bit 3: 0 ----> 1 (Single bit changes) Bit 2: 1 ----> 0 (Spurious states occur) Bit 2: 1 ----> 1 Bit 1: 1 ----> 0 Bit 1: 0 ----> 0 Bit 0: 1 ----> 0 Bit 0: 0 ----> 0
Algorithms for Gray Code Conversions
-
Binary to Gray Code:
The MSB is copied directly. Each subsequent Gray bit is formed by XORing adjacent binary bits:
-
Gray Code to Binary:
The MSB is copied directly. Each subsequent binary bit is obtained by XORing the previously computed binary bit with the current Gray bit:
CODEBinary to Gray Conversion Gray to Binary Conversion B3 B2 B1 B0 G3 G2 G1 G0 | | | | | | | | +-----+ (+)-----+ (+)---+ | +----+ +----+ +----+ | | | | | | | v v v v v v v G3 G2 G1 G0 B3(+)----->B2(+)-->B1(+)-->B0
7.3 Alphanumeric Codes: ASCII and Unicode
- ASCII (American Standard Code for Information Interchange): 7-bit code representing 128 characters (), including 95 printable characters (letters, digits, punctuation) and 33 non-printable control characters (CR, LF, ACK, NUL).
- Extended ASCII: 8-bit code (256 characters) incorporating European accented characters and graphical box-drawing glyphs.
- Unicode (UTF-8, UTF-16, UTF-32): Universal variable-width encoding capable of representing over 1.1 million characters across all world languages and technical symbol sets.
8. Error Detection and Correction Codes
Electromagnetic interference, cosmic rays, and inductive motor switching can flip bits during digital transmission and memory storage.
CODETransmitter Receiver Data + Parity Bit ----------> Channel (with Noise) ----------> Parity Checker (Even / Odd) | | Error! Syndrome Evaluator | Single Error Corrected!
8.1 Parity Bit Schemes (Single-Bit Error Detection)
A single redundant bit is appended to the data word:
- Even Parity: is chosen so the total number of 1s in the code word is even:
- Odd Parity: is chosen so the total number of 1s in the code word is odd:
- Limitation: Detects all single-bit errors (and any odd number of bit errors), but is completely blind to even numbers of bit flips ( errors).
8.2 Hamming Code (Single Error Correction, SEC)
Conceived by Richard Hamming, the Hamming Code detects and corrects single-bit errors dynamically by interleaving parity bits within message data bits.
The Parity Bit Equation
To locate which of the bits is in error, or to confirm that no error occurred, the parity bits must generate unique syndrome states:
CODE+-------------------------------------------------------------------------------------------------+ | Hamming Parity Bit Requirements Table | +---------------------+-----------------------+--------------------+------------------------------+ | Data Bits (m) | Minimum Parity Bits (p)| Total Bits (n=m+p) | Code Efficiency (m / n) | +---------------------+-----------------------+--------------------+------------------------------+ | 4 | 3 | 7 (Hamming (7,4)) | 57.1 % | | 8 | 4 | 12 (Hamming (12,8))| 66.7 % | | 16 | 5 | 21 | 76.2 % | | 32 | 6 | 38 | 84.2 % | | 64 | 7 | 71 | 90.1 % | +---------------------+-----------------------+--------------------+------------------------------+
Bit Placement and Syndrome Calculation
- Parity Bit Positioning: Parity bits are assigned strictly to positions that are powers of 2:
- Data Bit Positioning: The remaining bit locations () hold data bits.
- Parity Coverage: Each parity bit checks all bit positions whose binary index has a
1in the parity bit's corresponding power-of-two position:- (checks bits with LSB ): Bits
- (checks bits with bit ): Bits
- (checks bits with bit ): Bits
- Syndrome Evaluation at Receiver:
At the receiver, the parity check equations are evaluated to produce the syndrome word :- If , no bit error occurred.
- If , the decimal integer value of points directly to the erroneous bit position (e.g., ). Inverting that bit restores the original data word perfectly.
"""
out_dir = "content/Sem2/ECE213/unit1"
os.makedirs(out_dir, exist_ok=True)
notes_path = os.path.join(out_dir, "notes.md")
with open(notes_path, "w", encoding="utf-8") as f:
f.write(notes_content.strip() + "\n")
print(f"Written ECE213 Unit 1 notes.md to {notes_path}, total characters: {len(notes_content)}")