ECE279Semester 2 • 1 CreditsElective Subjects

Basic Electrical And Electronics Engineering Laboratory

Hands-on engineering laboratory course covering practical circuit experimentation: verification of foundational electrical laws (Ohm's, KCL, KVL) and network theorems; characterization of semiconductor devices (PN junction diode, Zener diode, BJT CE mode) and power supply rectifiers; embedded programming and sensor/actuator interfacing with Arduino Uno; and experimental verification, design, and troubleshooting of digital combinational (adders, multiplexers, decoders) and sequential logic circuits (flip-flops, shift registers, synchronous/asynchronous counters, 7-segment displays).

6 Units • Notes • Model Answers • MCQs
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Unit 1:Unit 1
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Unit 1

Unit 1 Exam Focus & Core Takeaways

Review the core definitions, standard architectures, and syntax patterns below. Pay special attention to sections highlighted with bullet points for your mid-term and end-term subjective questions.

Unit 1: Basic Electrical Circuit Laws, Measuring Instruments & Network Theorems Laboratory


1. Laboratory Safety, Orientation & Instrumentation Fundamentals

Electrical and electronics laboratories require strict adherence to procedural safety protocols and precise measurement techniques. When dealing with energized electrical circuits, breadboard prototyping, benchtop DC power supplies, and sensitive test instruments, the engineer must understand the internal impedance characteristics of measurement equipment to prevent instrument loading effects and component damage.

1.1 Laboratory Safety Guidelines & Electrical Hazards

  1. Power Isolation Before Wiring: Always ensure that benchtop power supplies and signal generators are switched off or their output terminals are disabled before modifying connections on a breadboard or terminal strip.
  2. Current Limiting Protection: Prior to connecting a circuit to a regulated DC power supply, set the supply's current limit dial to a safe threshold (e.g., 100 mA−500 mA100\text{ mA} - 500\text{ mA}) above the expected steady-state operating current to prevent catastrophic thermal runaway in case of short circuits.
  3. Polarity Verification: Electrolytic capacitors, semiconductor diodes, transistors, and integrated circuits are polarity-sensitive. Reversing polarity across electrolytic capacitors causes dielectric breakdown, internal gas generation, and potential rupture.
  4. Meter Protection:
    • Never switch the measurement function of a Digital Multimeter (DMM) while test leads are actively connected across a live circuit.
    • Never connect an ammeter in parallel with a voltage source or across a component with an active potential difference. Because an ammeter exhibits near-zero internal resistance (RA→0R_A \to 0), connecting it in parallel creates a dead short circuit, blowing the meter's internal protective fuse or damaging the current shunt resistor.
    • Always de-energize the circuit before taking resistance measurements with an ohmmeter. Measuring resistance in a live circuit destroys the internal reference current source of the ohmmeter.

1.2 Benchtop Test and Measuring Instruments

CODE
+---------------------------------------------------------------------------------+
|                         BENCHTOP INSTRUMENTATION OVERVIEW                        |
+---------------------------------------------------------------------------------+
|  1. Regulated DC Power Supply:                                                  |
|     - Dual tracking channels (0 - 30 V, 0 - 3 A) + Fixed 5 V / 3.3 V rail       |
|     - Constant Voltage (CV) and Constant Current (CC) automatic crossover       |
|                                                                                 |
|  2. Digital Multimeter (DMM):                                                   |
|     - Voltage Modes (DCV, ACV): Input Impedance R_in ~ 10 M-Ohm                 |
|     - Current Modes (DCA, ACA): Low series shunt resistance (R_shunt ~ 0.1 Ohm) |
|     - Resistance (Ohmmeter), Continuity Beeper, Diode Forward Drop Test         |
|                                                                                 |
|  3. Digital Storage Oscilloscope (DSO) / Cathode Ray Oscilloscope (CRO):         |
|     - Real-time time-domain waveform capture: V_peak, V_pp, V_rms, Period, Freq |
|     - Input Channel Coupling: DC (passes DC + AC), AC (blocks DC via series cap)|
|     - Triggering: Edge (Rising/Falling), Level, Hold-off                        |
|                                                                                 |
|  4. Function / Arbitrary Waveform Generator:                                    |
|     - Synthesizes Sine, Square, Triangle, Ramp, and Pulse waveforms             |
|     - Standard output termination impedance: 50 Ohm                             |
|     - Controls: Frequency, Amplitude (V_pp), DC Offset, Symmetry / Duty Cycle   |
+---------------------------------------------------------------------------------+

Detailed Characteristics of Key Instruments:

  1. Digital Multimeter (DMM) Loading Effect:

    • When measuring voltage across a high-resistance component R1R_1, the DMM places its internal resistance RVR_V (typically 10 MΩ10\text{ M}\Omega) in parallel with R1R_1. The effective equivalent resistance drops to:
      Req=R1⋅RVR1+RVR_{eq} = \frac{R_1 \cdot R_V}{R_1 + R_V}
    • If R1≪RVR_1 \ll R_V (e.g., R1=1 kΩR_1 = 1\text{ k}\Omega), Req≈0.9999⋅R1R_{eq} \approx 0.9999 \cdot R_1, introducing negligible loading error (<0.01%<0.01\%). However, if R1=1 MΩR_1 = 1\text{ M}\Omega, Req=1⋅1011 MΩ≈0.909 MΩR_{eq} = \frac{1 \cdot 10}{11}\text{ M}\Omega \approx 0.909\text{ M}\Omega, producing a severe −9.1%-9.1\% measurement error.
    • Conversely, when measuring circuit branch current, inserting an ammeter introduces an internal shunt resistance RAR_A. The actual current in the branch is reduced due to the burden voltage (Vburden=I⋅RAV_{burden} = I \cdot R_A).
  2. Oscilloscope Voltage and Timing Measurements:

    • Peak-to-Peak Voltage (VppV_{pp}): Vertical distance between positive crest and negative trough:
      Vpp=Vmax−VminV_{pp} = V_{max} - V_{min}
    • Root Mean Square Voltage (VrmsV_{rms}) for sinusoidal signal:
      Vrms=Vm2≈0.7071⋅Vm=Vpp22V_{rms} = \frac{V_m}{\sqrt{2}} \approx 0.7071 \cdot V_m = \frac{V_{pp}}{2\sqrt{2}}
    • Time Period (TT) and Frequency (ff):
      f=1T=1Horizontal Divisions per Cycle×Time/Div Settingf = \frac{1}{T} = \frac{1}{\text{Horizontal Divisions per Cycle} \times \text{Time/Div Setting}}

1.3 Solderless Breadboard Architecture & Prototyping Rules

CODE
+-------------------------------------------------------------------------------+
|                      BREADBOARD INTERNAL BUS ARCHITECTURE                     |
+-------------------------------------------------------------------------------+
|  Top Power Rail (+)   [ o o o o o ]  -  [ o o o o o ]  -  [ o o o o o ]  (+)  |
|  Top Ground Rail (-)  [ o o o o o ]  -  [ o o o o o ]  -  [ o o o o o ]  (-)  |
+-------------------------------------------------------------------------------+
|  Row A                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row B                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row C                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row D                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row E                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|                       ======= CENTRAL DIVIDING TROUGH (0.3" DIP) =======      |
|  Row F                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row G                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row H                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row I                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
|  Row J                [ o   o   o   o   o ] ... [ o   o   o   o   o ]         |
+-------------------------------------------------------------------------------+
|  Bottom Ground (-)    [ o o o o o ]  -  [ o o o o o ]  -  [ o o o o o ]  (-)  |
|  Bottom Power Rail(+) [ o o o o o ]  -  [ o o o o o ]  -  [ o o o o o ]  (+)  |
+-------------------------------------------------------------------------------+
  • Terminal Strips (Columns): Vertical groups of 5 tie-points (A through E and F through J) are connected electrically underneath by spring-clip metal contacts.
  • Center Divider: A 0.3-inch (7.62 mm) trough isolates the top bank (Rows A-E) from the bottom bank (Rows F-J), precisely matching standard Dual In-line Package (DIP) IC lead spacing.
  • Buses (Power Distribution Rails): Horizontal rows running along the top and bottom provide low-impedance power supply (VCCV_{CC}) and ground (GNDGND) distribution. Note: Many full-size breadboards feature a split in the middle of the bus lines, requiring jumper wire bridges to maintain continuity across the entire board length.

1.4 Resistor Color Coding Systems

Resistor values are marked using international color-band codes:

ColorSignificant DigitMultiplierTolerance (±\pm)
Black0100=110^0 = 1-
Brown1101=1010^1 = 10±1%\pm 1\% (F)
Red2102=10010^2 = 100±2%\pm 2\% (G)
Orange3103=1 kΩ10^3 = 1\text{ k}\Omega-
Yellow4104=10 kΩ10^4 = 10\text{ k}\Omega-
Green5105=100 kΩ10^5 = 100\text{ k}\Omega±0.5%\pm 0.5\% (D)
Blue6106=1 MΩ10^6 = 1\text{ M}\Omega±0.25%\pm 0.25\% (C)
Violet7107=10 MΩ10^7 = 10\text{ M}\Omega±0.1%\pm 0.1\% (B)
Gray810810^8±0.05%\pm 0.05\%
White910910^9-
Gold-10−1=0.110^{-1} = 0.1±5%\pm 5\% (J)
Silver-10−2=0.0110^{-2} = 0.01±10%\pm 10\% (K)
None--±20%\pm 20\%

Decoding Formulas:

  • 4-Band Resistor:
    R=(D1⋅10+D2)×10Multiplier±Tolerance%R = (D_1 \cdot 10 + D_2) \times 10^{\text{Multiplier}} \pm \text{Tolerance}\%
    Example: Brown, Black, Red, Gold →(1⋅10+0)×102±5%=10×100=1000 Ω=1 kΩ±5%\to (1 \cdot 10 + 0) \times 10^2 \pm 5\% = 10 \times 100 = 1000\,\Omega = 1\text{ k}\Omega \pm 5\%.
    Acceptable resistance range: 950 Ω≤R≤1050 Ω950\,\Omega \le R \le 1050\,\Omega.
  • 5-Band Resistor (Precision Resistors):
    R=(D1⋅100+D2⋅10+D3)×10Multiplier±Tolerance%R = (D_1 \cdot 100 + D_2 \cdot 10 + D_3) \times 10^{\text{Multiplier}} \pm \text{Tolerance}\%
    Example: Yellow, Violet, Black, Red, Brown →(470)×102±1%=47,000 Ω=47 kΩ±1%\to (470) \times 10^2 \pm 1\% = 47,000\,\Omega = 47\text{ k}\Omega \pm 1\%.

2. Experiment 1: Verification of Ohm's Law

2.1 Aim

To experimentally verify Ohm's Law by observing the direct linear relationship between the potential difference (VV) applied across a pure resistive element and the resulting current (II) flowing through it, and to determine the experimental resistance from the slope of the V−IV-I characteristic graph.

2.2 Theoretical Foundation

Ohm's Law states that at constant ambient temperature and unchanging physical dimensions, the electric current (II) traversing a linear metallic conductor is directly proportional to the potential difference (VV) applied across its terminal boundaries:
V∝I  ⟹  V=I⋅RV \propto I \implies V = I \cdot R
Where RR represents the ohmic resistance of the conductor, expressed in ohms (Ω\Omega).
The slope of the VV versus II graph yields the resistance directly:
Slope=ΔVΔI=R(or ΔIΔV=1R=G, the conductance)\text{Slope} = \frac{\Delta V}{\Delta I} = R \quad (\text{or } \frac{\Delta I}{\Delta V} = \frac{1}{R} = G, \text{ the conductance})

2.3 Apparatus Required

  1. Regulated Variable DC Power Supply (0−30 V,2 A0-30\text{ V}, 2\text{ A}) - 1 No.
  2. Carbon film resistor (R=1 kΩ,1/4 WR = 1\text{ k}\Omega, 1/4\text{ W} or 2.2 kΩ,1/4 W2.2\text{ k}\Omega, 1/4\text{ W}) - 1 No.
  3. Digital Multimeter (configured for DC voltage measurement, 0−20 V0-20\text{ V}) - 1 No.
  4. Digital Multimeter (configured for DC current measurement, 0−20 mA0-20\text{ mA}) - 1 No.
  5. Solderless Breadboard & connecting patch leads.

2.4 Circuit Schematic Diagram

CODE
         Ammeter (DCA)
     +----[ (A) ]----+
     |               |
     | +           - |
   +---+            [R] Test Resistor (1 k-Ohm)
   |   |            [ ]
Vs |   | DC Supply   |
   |   |            ===
   +---+             |
     | -             |
     +---------------+-----------------+
     |                                 |
     +-----------[ (V) ]---------------+
                 Voltmeter (DCV)

2.5 Experimental Procedure

  1. Inspect the nominal resistance of the test resistor using the color-coding bands and record its nominal value.
  2. Switch the DMM to the resistance (Ω\Omega) function, measure the actual cold resistance of the resistor disconnected from any circuit, and record it as RmeasuredR_{measured}.
  3. Wire the circuit on the breadboard precisely as illustrated in the schematic:
    • Connect the positive output rail of the DC power supply to the positive terminal of the DMM ammeter.
    • Connect the negative terminal of the ammeter to the top lead of the test resistor.
    • Connect the bottom lead of the test resistor back to the negative rail of the DC power supply.
    • Connect the voltmeter directly across the test resistor terminals in parallel.
  4. Ensure the power supply voltage knob is dialed down to 0.0 V0.0\text{ V} before switching on mains power.
  5. Incrementally adjust the DC supply voltage from 0 V0\text{ V} to 10 V10\text{ V} in discrete steps of 1.0 V1.0\text{ V}.
  6. At each voltage increment, record the exact voltage (VV) displayed on the voltmeter and the corresponding current (II) displayed on the ammeter into the observation table.
  7. Compute the calculated resistance Rcalc=V/IR_{calc} = V / I for every recorded data pair.
  8. Plot the graph of Voltage (VV, Y-axis in Volts) versus Current (II, X-axis in Milliamperes).

2.6 Observation and Data Table

Nominal Resistor Value: 1000 Ω1000\,\Omega (±5%\pm 5\%). Measured Cold Resistance (RmeasuredR_{measured}): 994 Ω994\,\Omega.

S.No.Applied Voltage VV (Volts)Measured Current II (mA)Calculated R=V/IR = V/I (Ω\Omega)Error Against RmeasR_{meas} (%\%)
11.001.01990.1−0.39%-0.39\%
22.002.02990.1−0.39%-0.39\%
33.003.01996.7+0.27%+0.27\%
44.004.02995.0+0.10%+0.10\%
55.005.03994.00.00%0.00\%
66.006.04993.4−0.06%-0.06\%
77.007.05992.9−0.11%-0.11\%
88.008.04995.0+0.10%+0.10\%
99.009.06993.4−0.06%-0.06\%
1010.0010.05995.0+0.10%+0.10\%

2.7 Calculations and Result

  • Mean Experimental Resistance:
    Rmean=110∑i=110Ri=9945.610=994.56 ΩR_{mean} = \frac{1}{10}\sum_{i=1}^{10} R_i = \frac{9945.6}{10} = 994.56\,\Omega
  • Slope from Graph:
    Slope=ΔVΔI=10.00 V−2.00 V(10.05−2.02)×10−3 A=8.00 V8.03×10−3 A=996.26 Ω\text{Slope} = \frac{\Delta V}{\Delta I} = \frac{10.00\text{ V} - 2.00\text{ V}}{(10.05 - 2.02) \times 10^{-3}\text{ A}} = \frac{8.00\text{ V}}{8.03 \times 10^{-3}\text{ A}} = 996.26\,\Omega
  • Percentage Discrepancy:
    % Discrepancy=∣Rmean−Rmeasured∣Rmeasured×100=∣994.56−994.0∣994.0×100=0.056%\% \text{ Discrepancy} = \frac{|R_{mean} - R_{measured}|}{R_{measured}} \times 100 = \frac{|994.56 - 994.0|}{994.0} \times 100 = 0.056\%
    Conclusion: The linear relationship V∝IV \propto I passing through the origin is confirmed within experimental limits, verifying Ohm's Law.

3. Experiment 2: Verification of Kirchhoff's Current Law (KCL)

3.1 Aim

To experimentally verify Kirchhoff's Current Law at a nodal junction in a multi-branch parallel-series DC resistive network.

3.2 Theoretical Foundation

Kirchhoff's Current Law (KCL), based on the conservation of electric charge, dictates that the algebraic sum of electric currents entering and exiting any electrical node (junction) is identically zero:
∑k=1nIk=0  ⟺  ∑Ientering=∑Ileaving\sum_{k=1}^{n} I_k = 0 \iff \sum I_{\text{entering}} = \sum I_{\text{leaving}}
For a node connecting an incoming source current branch ItotalI_{total} and splitting into two parallel branches I1I_1 and I2I_2:
Itotal=I1+I2  ⟹  Itotal−(I1+I2)=0I_{total} = I_1 + I_2 \implies I_{total} - (I_1 + I_2) = 0

3.3 Apparatus Required

  1. Regulated DC Power Supply (0−30 V0-30\text{ V}) - 1 No.
  2. Standard Resistors: R1=1 kΩR_1 = 1\text{ k}\Omega, R2=2.2 kΩR_2 = 2.2\text{ k}\Omega, R3=3.3 kΩR_3 = 3.3\text{ k}\Omega (1/4 Watt) - 1 No. each.
  3. Digital Multimeters (DCA mode, 0−20 mA0-20\text{ mA}) - 3 Nos. (or 1 DMM sequentially relocated).
  4. Breadboard and jumper wires.

3.4 Circuit Schematic Diagram

CODE
               Node A (Junction)
      +--------------o--------------+
      |              |              |
      |          +---|---+      +---|---+
    [R1]         |  [R2] |      |  [R3] |
  1 k-Ohm        | 2.2k  |      | 3.3k  |
      |          |       |      |       |
  (I_total)      |  (I1) |      |  (I2) |
      |          +---|---+      +---|---+
      |              |              |
    +---+            +-------o------+
    |   |                    |
Vs  |   | DC Source          | Reference
    |   | (10 V)             | Ground
    +---+                    |
      |                      |
      +----------------------+

3.5 Experimental Procedure

  1. Measure the exact cold resistances of R1,R2,R3R_1, R_2, R_3 with the DMM ohmmeter:
    • R1=1.00 kΩR_1 = 1.00\text{ k}\Omega, R2=2.18 kΩR_2 = 2.18\text{ k}\Omega, R3=3.28 kΩR_3 = 3.28\text{ k}\Omega.
  2. Assemble the network on the breadboard. R1R_1 is in series with the parallel pair (R2∥R3R_2 \parallel R_3).
  3. Connect the DC power supply and set the input terminal voltage to VS=10.0 VV_S = 10.0\text{ V}.
  4. Break the circuit immediately preceding Node A and insert the DMM ammeter in series to measure the entering current ItotalI_{total}. Record the reading.
  5. Reconnect the node. Break the branch leading into R2R_2 and insert the ammeter in series to measure branch current I1I_1. Record the reading.
  6. Reconnect branch 1. Break the branch leading into R3R_3 and insert the ammeter in series to measure branch current I2I_2. Record the reading.
  7. Repeat the measurements at VS=12.0 VV_S = 12.0\text{ V} and VS=15.0 VV_S = 15.0\text{ V}.
  8. Evaluate whether Itotal=I1+I2I_{total} = I_1 + I_2 for each voltage setting.

3.6 Observation and Analysis Table

| VSV_S (Volts) | Measured ItotalI_{total} (mA) | Measured I1I_1 (R2R_2 branch) (mA) | Measured I2I_2 (R3R_3 branch) (mA) | Sum (I1+I2)(I_1 + I_2) (mA) | Difference ∣Itotal−(I1+I2)∣|I_{total} - (I_1 + I_2)| (mA) |
|:---:|:---:|:---:|:---:|:---:|:---:|
| 10.0 V | 4.32 mA | 2.59 mA | 1.72 mA | 4.31 mA | 0.01 mA |
| 12.0 V | 5.18 mA | 3.11 mA | 2.06 mA | 5.17 mA | 0.01 mA |
| 15.0 V | 6.47 mA | 3.88 mA | 2.58 mA | 6.46 mA | 0.01 mA |

3.7 Analytical Verification & Percentage Error

  • Equivalent resistance of parallel branch:
    Rp=R2∥R3=2180×32802180+3280=7,150,4005460≈1309.6 ΩR_p = R_2 \parallel R_3 = \frac{2180 \times 3280}{2180 + 3280} = \frac{7,150,400}{5460} \approx 1309.6\,\Omega
  • Total circuit resistance:
    Rtotal=R1+Rp=1000+1309.6=2309.6 ΩR_{total} = R_1 + R_p = 1000 + 1309.6 = 2309.6\,\Omega
  • Theoretical currents at VS=10 VV_S = 10\text{ V}:
    Itotal(th)=10 V2309.6 Ω=4.330 mAI_{total(th)} = \frac{10\text{ V}}{2309.6\,\Omega} = 4.330\text{ mA}
    VNodeA=10−(Itotal⋅R1)=10−(4.330×1.0)=5.670 VV_{Node A} = 10 - (I_{total} \cdot R_1) = 10 - (4.330 \times 1.0) = 5.670\text{ V}
    I1(th)=5.670 V2180 Ω=2.601 mA,I2(th)=5.670 V3280 Ω=1.729 mAI_{1(th)} = \frac{5.670\text{ V}}{2180\,\Omega} = 2.601\text{ mA}, \quad I_{2(th)} = \frac{5.670\text{ V}}{3280\,\Omega} = 1.729\text{ mA}
  • Current Sum:
    I1(th)+I2(th)=2.601+1.729=4.330 mA=Itotal(th)I_{1(th)} + I_{2(th)} = 2.601 + 1.729 = 4.330\text{ mA} = I_{total(th)}
  • Experimental Percentage Error:
    % Error=∣4.32−4.31∣4.32×100=0.23%\% \text{ Error} = \frac{|4.32 - 4.31|}{4.32} \times 100 = 0.23\%
    Conclusion: The summation of currents entering Node A matches the summation of currents departing Node A within 0.23%0.23\%, fully validating Kirchhoff's Current Law.

4. Experiment 3: Verification of Kirchhoff's Voltage Law (KVL)

4.1 Aim

To experimentally verify Kirchhoff's Voltage Law in a closed electrical loop containing multiple resistive components and a DC voltage excitation source.

4.2 Theoretical Foundation

Kirchhoff's Voltage Law (KVL), derived from the conservation of energy in conservative electrostatic fields, states that the directed algebraic sum of all potential differences (voltages) encountered around any closed loop in an electrical circuit is identically zero:
∮E⃗⋅dl⃗=0  ⟺  ∑k=1MVk=0\oint \vec{E} \cdot d\vec{l} = 0 \iff \sum_{k=1}^{M} V_k = 0
Tracing clockwise around a single closed series loop energized by source VSV_S across three series resistors R1,R2,R3R_1, R_2, R_3:
VS−VR1−VR2−VR3=0  ⟹  VS=VR1+VR2+VR3V_S - V_{R1} - V_{R2} - V_{R3} = 0 \implies V_S = V_{R1} + V_{R2} + V_{R3}
Where potential rises across active power sources are assigned positive sign convention and potential drops across passive dissipation elements are assigned negative sign convention.

4.3 Apparatus Required

  1. Regulated DC Power Supply (0−30 V0-30\text{ V}) - 1 No.
  2. Precision Resistors: R1=1 kΩR_1 = 1\text{ k}\Omega, R2=2.2 kΩR_2 = 2.2\text{ k}\Omega, R3=4.7 kΩR_3 = 4.7\text{ k}\Omega (1/4 W) - 1 No. each.
  3. Digital Multimeter (DCV range: 0−20 V0-20\text{ V}, Rin=10 MΩR_{in} = 10\text{ M}\Omega) - 1 No.
  4. Breadboard and hook-up leads.

4.4 Circuit Schematic Diagram

CODE
         +------> Loop 1 (Clockwise) ------+
         |                                 |
         |         +----[ R1 ]----+        |
         |         |   1 k-Ohm    |        |
       +---+       |              |        |
       |   |       |       +----[ R2 ]----+|
    Vs |   | DC    |       |   2.2k-Ohm    |
 (12V) |   | Source|       |              |
       +---+       |       |       +----[ R3 ]----+
         |         |       |       |   4.7k-Ohm   |
         |         |       |       |              |
         +---------+-------+-------+--------------+
                  Reference Return Bus

4.5 Experimental Procedure

  1. Record measured values of resistors using the DMM ohmmeter:
    • R1=0.995 kΩR_1 = 0.995\text{ k}\Omega, R2=2.190 kΩR_2 = 2.190\text{ k}\Omega, R3=4.680 kΩR_3 = 4.680\text{ k}\Omega.
  2. Connect R1,R2R_1, R_2, and R3R_3 in strict series on the breadboard.
  3. Connect the output of the DC power supply across the series combination.
  4. Adjust the supply voltage to VS=12.00 VV_S = 12.00\text{ V}, verified with the digital voltmeter.
  5. Without disturbing circuit connections, measure the individual voltage drops across each resistor:
    • Connect the voltmeter probes across R1R_1 to record V1V_1.
    • Connect the voltmeter probes across R2R_2 to record V2V_2.
    • Connect the voltmeter probes across R3R_3 to record V3V_3.
  6. Repeat the test for VS=8.00 VV_S = 8.00\text{ V} and VS=15.00 VV_S = 15.00\text{ V}.
  7. Compute the sum (V1+V2+V3)(V_1 + V_2 + V_3) and compare it against the applied supply voltage VSV_S.

4.6 Observation Table

VSV_S (Volts)Measured V1V_1 (R1R_1) (V)Measured V2V_2 (R2R_2) (V)Measured V3V_3 (R3R_3) (V)Sum (V1+V2+V3)(V_1 + V_2 + V_3) (V)Algebraic Residual (VS−∑Vi)(V_S - \sum V_i) (V)
8.00 V1.01 V2.23 V4.76 V8.00 V0.00 V
12.00 V1.52 V3.34 V7.14 V12.00 V0.00 V
15.00 V1.90 V4.18 V8.92 V15.00 V0.00 V

4.7 Mathematical Validation

  • At VS=12.00 VV_S = 12.00\text{ V}, total circuit resistance:
    RT=R1+R2+R3=995+2190+4680=7865 ΩR_T = R_1 + R_2 + R_3 = 995 + 2190 + 4680 = 7865\,\Omega
  • Circuit current:
    I=12.00 V7865 Ω=1.5257 mAI = \frac{12.00\text{ V}}{7865\,\Omega} = 1.5257\text{ mA}
  • Theoretical voltage drops:
    V1(th)=I⋅R1=1.5257 mA×0.995 kΩ=1.518 VV_{1(th)} = I \cdot R_1 = 1.5257\text{ mA} \times 0.995\text{ k}\Omega = 1.518\text{ V}
    V2(th)=I⋅R2=1.5257 mA×2.190 kΩ=3.341 VV_{2(th)} = I \cdot R_2 = 1.5257\text{ mA} \times 2.190\text{ k}\Omega = 3.341\text{ V}
    V3(th)=I⋅R3=1.5257 mA×4.680 kΩ=7.140 VV_{3(th)} = I \cdot R_3 = 1.5257\text{ mA} \times 4.680\text{ k}\Omega = 7.140\text{ V}
    ∑Vi(th)=1.518+3.341+7.140=11.999 V≈12.00 V\sum V_{i(th)} = 1.518 + 3.341 + 7.140 = 11.999\text{ V} \approx 12.00\text{ V}
    Conclusion: The measured sum of voltage drops across the series elements identically balances the source potential, confirming KVL with 0.00 V0.00\text{ V} error residual.

5. Experiment 4: Experimental Verification of Thevenin's Theorem

5.1 Aim

To experimentally determine the Thevenin equivalent voltage (VthV_{th}) and Thevenin equivalent resistance (RthR_{th}) of a linear DC network across specified load terminals, construct the Thevenin equivalent circuit, and verify that load current (ILI_L) through varying load resistors (RLR_L) is identical in both original and equivalent circuits.

5.2 Theoretical Foundation

Thevenin's Theorem states that any linear bidirectional electrical network containing independent voltage/current sources and linear bilateral resistors can be replaced, across any two accessible load terminals (A-B), by an equivalent two-terminal circuit consisting of:

  1. An ideal independent voltage source VthV_{th} (Thevenin voltage), equal to the open-circuit voltage across terminals A-B when the load resistor RLR_L is removed (Vth=VocV_{th} = V_{oc}).
  2. Connected in series with an equivalent resistance RthR_{th} (Thevenin resistance), which is the input driving-point resistance observed looking back into terminals A-B with all internal independent voltage sources replaced by short circuits (0 V) and independent current sources replaced by open circuits (0 A).
CODE
   Original Active Network                     Thevenin Equivalent Circuit
  +-----------------------+   Term A                     R_th        Term A
  |  Linear DC Network    |-----o             +--------/\/\/\---------o
  |  with Independent     |                   |                       |
  |  Sources & Resistors  |     [R_L]   ==>  (~) V_th               [R_L]
  |                       |-----o             |                       |
  +-----------------------+   Term B          +-----------------------o
                                                                     Term B

The load current flowing through RLR_L is:
IL=VthRth+RLI_L = \frac{V_{th}}{R_{th} + R_L}
And the voltage appearing across the load terminals is:
VL=IL⋅RL=Vth⋅(RLRth+RL)V_L = I_L \cdot R_L = V_{th} \cdot \left(\frac{R_L}{R_{th} + R_L}\right)

5.3 Laboratory Network Specification

We construct a bridge-T resistive network:

  • Source: VS=12.0 VV_S = 12.0\text{ V}
  • Resistors: R1=1.0 kΩR_1 = 1.0\text{ k}\Omega, R2=1.0 kΩR_2 = 1.0\text{ k}\Omega, R3=2.2 kΩR_3 = 2.2\text{ k}\Omega
  • Load Resistors (RLR_L): 470 Ω470\,\Omega, 1.0 kΩ1.0\text{ k}\Omega, 2.2 kΩ2.2\text{ k}\Omega
CODE
                   R1 (1 k-Ohm)            Term A
           +----------/\/\/\---------o-------o
           |                         |       |
         +---+                      [R2]    [RL] Load Resistor
      Vs |   | 12V                  [1k]    [  ]
         +---+                       |       |
           |         R3 (2.2k)       |       |
           +----------/\/\/\---------+-------o
                                           Term B

5.4 Theoretical Calculation of VthV_{th} and RthR_{th}

  1. Thevenin Voltage (Vth=VocV_{th} = V_{oc}):
    Remove RLR_L between terminals A and B. The open-circuit voltage across terminals A-B is the potential across R2R_2:
    Vth=Voc=VS⋅(R2R1+R2+R3)=12 V⋅(10001000+1000+2200)=12⋅10004200=2.857 VV_{th} = V_{oc} = V_S \cdot \left(\frac{R_2}{R_1 + R_2 + R_3}\right) = 12\text{ V} \cdot \left(\frac{1000}{1000 + 1000 + 2200}\right) = 12 \cdot \frac{1000}{4200} = 2.857\text{ V}
  2. Thevenin Resistance (RthR_{th}):
    Deactivate the independent voltage source by replacing VSV_S with a short circuit (0 Ω\Omega jumper wire):
    Looking into terminals A and B, R2R_2 is in parallel with the series combination of (R1+R3)(R_1 + R_3):
    Rth=R2∥(R1+R3)=1000∥(1000+2200)=1000∥3200R_{th} = R_2 \parallel (R_1 + R_3) = 1000 \parallel (1000 + 2200) = 1000 \parallel 3200
    Rth=1000×32001000+3200=3,200,0004200=761.9 ΩR_{th} = \frac{1000 \times 3200}{1000 + 3200} = \frac{3,200,000}{4200} = 761.9\,\Omega

5.5 Experimental Procedure

Step 1: Measurement of ILI_L in the Original Circuit

  1. Assemble the original network on the breadboard with VS=12.0 VV_S = 12.0\text{ V}.
  2. Insert load resistor RL=470 ΩR_L = 470\,\Omega between terminals A and B with an ammeter in series.
  3. Record measured load current ILI_L.
  4. Repeat for RL=1.0 kΩR_L = 1.0\text{ k}\Omega and RL=2.2 kΩR_L = 2.2\text{ k}\Omega.

Step 2: Experimental Measurement of VthV_{th}

  1. Disconnect and remove load resistor RLR_L entirely, leaving terminals A-B open-circuited.
  2. Connect a digital voltmeter across terminals A and B.
  3. Record the open-circuit terminal voltage: Vth(meas)=VocV_{th(meas)} = V_{oc}.

Step 3: Experimental Measurement of RthR_{th}

Two alternative experimental techniques are utilized:

  • Method A (Direct Ohmmeter with De-energized Sources): Turn off the power supply, disconnect it from the circuit, replace its connection with a shorting jumper wire, and measure the resistance across terminals A-B using the DMM ohmmeter. Record Rth(ohmmeter)R_{th(ohmmeter)}.
  • Method B (Half-Voltage Loading Method / Decade Resistance Box): Reconnect the power supply with terminals A-B open (Voc=VthV_{oc} = V_{th}). Connect a variable decade resistance box (RboxR_{box}) across terminals A-B. Adjust RboxR_{box} downward until the terminal voltage VLV_L drops to exactly half of the open-circuit voltage (VL=Vth/2V_L = V_{th}/2). At this half-voltage point, Rbox=RthR_{box} = R_{th}. Record Rth(half−V)R_{th(half-V)}.

Step 4: Verification using the Thevenin Equivalent Circuit

  1. Set an auxiliary DC power supply output to precisely Vth(meas)=2.86 VV_{th(meas)} = 2.86\text{ V}.
  2. Connect a series resistor equal to Rth=762 ΩR_{th} = 762\,\Omega (using a precision potentiometer or combination).
  3. Connect load resistors RLR_L across the equivalent terminals and measure the resulting load current IL(eq)I_{L(eq)}.

5.6 Observation and Comparison Table

Experimental Values Measured: Vth=2.85 VV_{th} = 2.85\text{ V}, Rth=760 ΩR_{th} = 760\,\Omega.

Load Resistance RLR_LCalculated ILI_L (mA)Measured ILI_L (Original Circuit) (mA)Measured ILI_L (Thevenin Equivalent) (mA)Discrepancy (%\%)
470 Ω470\,\Omega2.32 mA2.32\text{ mA}2.31 mA2.31\text{ mA}2.32 mA2.32\text{ mA}0.43%0.43\%
1000 Ω1000\,\Omega (1 kΩ1\text{ k}\Omega)1.62 mA1.62\text{ mA}1.61 mA1.61\text{ mA}1.62 mA1.62\text{ mA}0.62%0.62\%
2200 Ω2200\,\Omega (2.2 kΩ2.2\text{ k}\Omega)0.96 mA0.96\text{ mA}0.96 mA0.96\text{ mA}0.96 mA0.96\text{ mA}0.00%0.00\%

Conclusion: The load currents in the original network and its Thevenin equivalent circuit match within <1%<1\% error, validating Thevenin's Theorem.


6. Experiment 5: Experimental Verification of Norton's Theorem

6.1 Aim

To experimentally verify Norton's Theorem by finding the short-circuit Norton current (INI_N) and Norton equivalent resistance (RNR_N) of a DC circuit, establishing source transformation equivalence with Thevenin's theorem.

6.2 Theoretical Foundation

Norton's Theorem states that any linear active bilateral DC network with accessible terminals A and B can be replaced by an equivalent circuit containing:

  1. An ideal independent constant current source INI_N (Norton current), equal to the current that flows when terminals A and B are short-circuited together (IN=IscI_N = I_{sc}).
  2. Connected in parallel with an equivalent resistance RNR_N (Norton resistance), which is identically equal to the Thevenin equivalent resistance (RN=RthR_N = R_{th}).
CODE
   Norton Equivalent Circuit                     Thevenin <--> Norton Transformation
          Term A                                         V_th = I_N * R_N
       +----o----------------+                            I_N = V_th / R_th
       |                     |                            R_N = R_th
      (^) I_N               [R_N]   [R_L]
       |                     |
       +----o----------------+
          Term B

The load current delivered to RLR_L in the Norton equivalent circuit is governed by the current divider principle:
IL=IN⋅(RNRN+RL)I_L = I_N \cdot \left(\frac{R_N}{R_N + R_L}\right)

6.3 Theoretical Calculation (Using Network from Experiment 4)

  • Network: VS=12.0 V,R1=1 kΩ,R2=1 kΩ,R3=2.2 kΩV_S = 12.0\text{ V}, R_1 = 1\text{ k}\Omega, R_2 = 1\text{ k}\Omega, R_3 = 2.2\text{ k}\Omega.
  • Norton Current (IN=IscI_N = I_{sc}):
    Short terminals A and B directly. This shorts out resistor R2R_2. The total current from source VSV_S flows through R1R_1 and R3R_3:
    Isc=VSR1+R3=12 V1000 Ω+2200 Ω=123200=3.75 mAI_{sc} = \frac{V_S}{R_1 + R_3} = \frac{12\text{ V}}{1000\,\Omega + 2200\,\Omega} = \frac{12}{3200} = 3.75\text{ mA}
  • Norton Resistance (RNR_N):
    RN=Rth=761.9 ΩR_N = R_{th} = 761.9\,\Omega
  • Source Transformation Check:
    Vth=IN⋅RN=3.75 mA×761.9 Ω=2.857 V(Identical to Experiment 4)V_{th} = I_N \cdot R_N = 3.75\text{ mA} \times 761.9\,\Omega = 2.857\text{ V} \quad (\text{Identical to Experiment 4})

6.4 Experimental Procedure

  1. Re-assemble the circuit on the breadboard.
  2. Set VS=12.0 VV_S = 12.0\text{ V}.
  3. Connect the DMM (configured as DCA ammeter, 0−20 mA0-20\text{ mA}) directly across terminals A and B with no load resistor attached. Because an ideal ammeter has negligible resistance, it establishes a true short-circuit across terminals A-B.
  4. Record the ammeter reading as Isc=INI_{sc} = I_N.
  5. Determine RNR_N by de-energizing the source and measuring driving-point resistance across terminals A-B using the ohmmeter (RN=RthR_N = R_{th}).
  6. Reconnect load resistors RL=470 Ω,1 kΩ,2.2 kΩR_L = 470\,\Omega, 1\text{ k}\Omega, 2.2\text{ k}\Omega one by one, measuring ILI_L.
  7. Compare the measured load currents against the values predicted by the Norton formula:
    IL=IN⋅(RNRN+RL)I_L = I_N \cdot \left(\frac{R_N}{R_N + R_L}\right)

6.5 Observation and Data Table

Experimental Values: IN=3.74 mAI_N = 3.74\text{ mA}, RN=760 ΩR_N = 760\,\Omega.

Load Resistance RLR_LTheoretical ILI_L (mA)Measured ILI_L in Network (mA)Calculated from Norton Equation (mA)
470 Ω470\,\Omega2.32 mA2.32\text{ mA}2.31 mA2.31\text{ mA}3.74×(760/1230)=2.31 mA3.74 \times (760 / 1230) = 2.31\text{ mA}
1000 Ω1000\,\Omega1.62 mA1.62\text{ mA}1.61 mA1.61\text{ mA}3.74×(760/1760)=1.61 mA3.74 \times (760 / 1760) = 1.61\text{ mA}
2200 Ω2200\,\Omega0.96 mA0.96\text{ mA}0.96 mA0.96\text{ mA}3.74×(760/2960)=0.96 mA3.74 \times (760 / 2960) = 0.96\text{ mA}

Conclusion: The measured load current matches Norton current-divider predictions within 0.5%0.5\%, confirming Norton's Theorem and the duality between Thevenin and Norton models.


7. Experiment 6: Verification of Maximum Power Transfer Theorem

7.1 Aim

To experimentally observe the transfer of electrical power from a DC source network to a variable resistive load, verify that maximum power transfer occurs strictly when RL=RthR_L = R_{th}, and plot the characteristic power curve PLP_L versus RLR_L.

7.2 Theoretical Foundation

The Maximum Power Transfer Theorem states that maximum power is delivered from an active linear DC source network to a variable load resistor RLR_L when the load resistance equals the Thevenin equivalent resistance of the source network as viewed from the load terminals:
RL=Rth=RsourceR_L = R_{th} = R_{source}

Mathematical Derivation:

In a Thevenin equivalent circuit with source voltage VthV_{th} and internal source resistance RthR_{th}:
IL=VthRth+RLI_L = \frac{V_{th}}{R_{th} + R_L}
Power delivered to the load resistor RLR_L:
PL=IL2⋅RL=(VthRth+RL)2⋅RL=Vth2⋅RL(Rth+RL)2P_L = I_L^2 \cdot R_L = \left(\frac{V_{th}}{R_{th} + R_L}\right)^2 \cdot R_L = \frac{V_{th}^2 \cdot R_L}{(R_{th} + R_L)^2}
To find the value of RLR_L that maximizes PLP_L, we differentiate PLP_L with respect to RLR_L and equate the derivative to zero:
dPLdRL=Vth2⋅(Rth+RL)2⋅(1)−RL⋅2(Rth+RL)(Rth+RL)4=0\frac{dP_L}{dR_L} = V_{th}^2 \cdot \frac{(R_{th} + R_L)^2 \cdot (1) - R_L \cdot 2(R_{th} + R_L)}{(R_{th} + R_L)^4} = 0
(Rth+RL)−2RL=0  ⟹  Rth−RL=0  ⟹  RL=Rth(R_{th} + R_L) - 2R_L = 0 \implies R_{th} - R_L = 0 \implies R_L = R_{th}
The maximum power delivered is:
PL(max)=Vth2⋅Rth(Rth+Rth)2=Vth2⋅Rth4Rth2=Vth24RthP_{L(max)} = \frac{V_{th}^2 \cdot R_{th}}{(R_{th} + R_{th})^2} = \frac{V_{th}^2 \cdot R_{th}}{4 R_{th}^2} = \frac{V_{th}^2}{4 R_{th}}

Efficiency Under Maximum Power Condition:

Total power generated by the source at maximum power:
Psource=IL⋅Vth=(Vth2Rth)⋅Vth=Vth22RthP_{source} = I_L \cdot V_{th} = \left(\frac{V_{th}}{2 R_{th}}\right) \cdot V_{th} = \frac{V_{th}^2}{2 R_{th}}
Efficiency:
η=PLPsource×100%=Vth24RthVth22Rth×100%=50%\eta = \frac{P_L}{P_{source}} \times 100\% = \frac{\frac{V_{th}^2}{4 R_{th}}}{\frac{V_{th}^2}{2 R_{th}}} \times 100\% = 50\%

Important Engineering Note: Maximum power transfer conditions are utilized in communications and audio signal processing where signal strength is prioritized over efficiency. In high-power electrical grid distribution, operating at 50%50\% efficiency would be catastrophic due to excessive thermal losses in internal generator/transformer windings (I2RsourceI^2 R_{source}); utility power distribution operates near RL≫RsourceR_L \gg R_{source} with efficiencies exceeding 95%95\%.

7.3 Experimental Setup

  • Source: Vth=10.0 VV_{th} = 10.0\text{ V}
  • Fixed Internal Source Resistance: Rth=1.0 kΩR_{th} = 1.0\text{ k}\Omega (1000 Ω1000\,\Omega)
  • Variable Load Resistor RLR_L: Decade Resistance Box (DRB) variable from 100 Ω100\,\Omega to 3000 Ω3000\,\Omega.
CODE
       +----/\/\/\-------+-------+
       |   R_th = 1k     |       |
     +---+             +---+     |
     |   |             |   | (V) Voltmeter
 V_th|   | 10V DC      |   |     |
 (10V)   |             +---+     |
     +---+               |       |
       |                 |     [R_L] Variable Load (DRB)
       |                 |     [   ]
       +-----------------+-------+

7.4 Experimental Procedure

  1. Set the DC supply to 10.0 V10.0\text{ V} with a precision series resistor of 1.00 kΩ1.00\text{ k}\Omega acting as RthR_{th}.
  2. Connect the Decade Resistance Box as RLR_L across the load terminals.
  3. Connect a DMM voltmeter across the load terminals to measure VLV_L.
  4. Vary RLR_L over a broad range below and above RthR_{th}:
    • 100 Ω,200 Ω,400 Ω,600 Ω,800 Ω,1000 Ω,1200 Ω,1500 Ω,2000 Ω,3000 Ω100\,\Omega, 200\,\Omega, 400\,\Omega, 600\,\Omega, 800\,\Omega, 1000\,\Omega, 1200\,\Omega, 1500\,\Omega, 2000\,\Omega, 3000\,\Omega.
  5. At each resistance step, record the terminal voltage VLV_L.
  6. Calculate load power:
    PL=VL2RLP_L = \frac{V_L^2}{R_L}
  7. Plot PLP_L (mW\text{mW}, Y-axis) versus RLR_L (Ω\Omega, X-axis).

7.5 Observation Table

Theoretical PL(max)=1024×1000=1004000 W=25.00 mWP_{L(max)} = \frac{10^2}{4 \times 1000} = \frac{100}{4000}\text{ W} = 25.00\text{ mW}.

StepLoad Resistance RLR_L (Ω\Omega)Measured VLV_L (V)Calculated IL=VL/RLI_L = V_L/R_L (mA)Calculated Power PL=VL2/RLP_L = V_L^2 / R_L (mW)
11000.91 V9.10 mA8.28 mW
22001.67 V8.35 mA13.94 mW
34002.86 V7.15 mA20.45 mW
46003.75 V6.25 mA23.44 mW
58004.44 V5.55 mA24.64 mW
61000 (RL=RthR_L = R_{th})5.00 V5.00 mA25.00 mW (Peak)
712005.45 V4.54 mA24.74 mW
815006.00 V4.00 mA24.00 mW
920006.67 V3.33 mA22.21 mW
1030007.50 V2.50 mA18.75 mW

7.6 Power Curve Plot Interpretation

CODE
Power P_L (mW)
  30 |
     |
  25 |                      * (Peak: 25.0 mW at R_L = 1000 Ohm)
     |                   *     *
  20 |                *           *
     |             *                 *
  15 |          *                       *
     |       *                             *
  10 |    *                                   *
     |  *                                        *
   0 +-----+-----+-----+-----+-----+-----+-----+-----+-----> R_L (Ohm)
     0    500   1000  1500  2000  2500  3000  3500
                (R_th)

The curve exhibits a single global maximum at RL=1000 Ω=RthR_L = 1000\,\Omega = R_{th}. For RL<RthR_L < R_{th}, power is limited by low load resistance despite high current (IL2RLI_L^2 R_L). For RL>RthR_L > R_{th}, power is limited by dropping circuit current despite high load resistance. Maximum power transfer occurs strictly at RL=RthR_L = R_{th}.


8. Laboratory Measurement Errors & Instrumental Uncertainty Analysis

Precise experimental reporting requires understanding the classification and quantification of errors:

8.1 Error Classification

  1. Systematic (Determinate) Errors:
    • Instrumental Errors: Inherent miscalibration of meters, friction in analog meter pivots, temperature drift in ADC voltage references, lead wire resistance.
    • Loading Errors: Distortions introduced because the meter disturbs the circuit under test (RV<∞R_V < \infty, RA>0R_A > 0).
    • Environmental Errors: Ambient temperature changes causing resistance variations (ΔR=R0⋅α⋅ΔT\Delta R = R_0 \cdot \alpha \cdot \Delta T).
  2. Random (Indeterminate) Errors:
    • Microscopic thermal electrical noise, slight contact resistance instability on breadboard spring clips, human visual parallax errors when reading analog scales.

8.2 Standard Error Quantification Formulas

  • Absolute Error (eae_a):
    ea=Xmeasured−Xtruee_a = X_{measured} - X_{true}
  • Relative Error (ere_r):
    er=Xmeasured−XtrueXtruee_r = \frac{X_{measured} - X_{true}}{X_{true}}
  • Percentage Error (%e\% e):
    %e=∣Xmeasured−XtrueXtrue∣×100%\% e = \left|\frac{X_{measured} - X_{true}}{X_{true}}\right| \times 100\%
  • Percentage Accuracy:
    % Accuracy=100%−%e\% \text{ Accuracy} = 100\% - \% e

9. Comprehensive Viva Voce Questions & Answers

Q1: Why must an ammeter always be connected in series and never in parallel?

Answer: An ammeter is designed to measure the rate of charge flow through a specific branch without altering the existing branch impedance. Consequently, its internal resistance is made as close to zero as technically feasible (RA→0R_A \to 0). If connected in parallel across a voltage source or loaded component, it creates a dead short circuit, resulting in a dangerous surge of current that destroys the meter or blows its protective fuse.

Q2: What is meant by the "loading effect" of a voltmeter, and how can it be minimized?

Answer: A voltmeter measures potential difference across two nodes by placing itself in parallel with the component under test. Because an actual voltmeter has finite internal resistance (RV≈10 MΩR_V \approx 10\text{ M}\Omega for modern DMMs), it draws a small current, reducing the equivalent resistance of the branch and causing the measured voltage to be lower than the true open-circuit voltage. The loading effect is minimized by ensuring RV≫RcircuitR_V \gg R_{circuit}.

Q3: Explain why a digital multimeter cannot measure resistance in an energized circuit.

Answer: An ohmmeter determines unknown resistance by injecting a small, calibrated internal reference DC current (IrefI_{ref}) across the test leads and measuring the resulting voltage drop (VxV_x) using its internal analog-to-digital converter (R=Vx/IrefR = V_x / I_{ref}). If external voltage or current is present in the circuit under test, it corrupts the voltage reading and can permanently damage the sensitive internal current source of the DMM.

Q4: State the fundamental conservation laws that underpin Kirchhoff's Current Law and Kirchhoff's Voltage Law.

Answer: Kirchhoff's Current Law (KCL) is based on the Law of Conservation of Electric Charge—charge cannot accumulate indefinitely or vanish at a microscopic node in steady state (∇⋅J⃗=0\nabla \cdot \vec{J} = 0). Kirchhoff's Voltage Law (KVL) is based on the Law of Conservation of Energy—the net work done in moving a unit test charge around any closed path in a static, conservative electric field is identically zero (∮E⃗⋅dl⃗=0\oint \vec{E} \cdot d\vec{l} = 0).

Q5: How do you determine the internal resistance RthR_{th} of an active circuit without turning off or modifying the internal circuit?

Answer: Use the half-voltage loading technique:

  1. Measure the open-circuit output voltage Voc=VthV_{oc} = V_{th} across the accessible terminals with an unloaded high-impedance voltmeter.
  2. Connect a variable decade resistance box or potentiometer across the terminals and decrease its resistance until the measured terminal voltage drops to exactly half of the open-circuit voltage (VL=Vth/2V_L = V_{th} / 2).
  3. At this operating point, the internal drop across RthR_{th} equals the voltage across RLR_L, which mathematically proves that Rload=RthR_{load} = R_{th}. Disconnect the variable resistor and measure its value.

Q6: What is the maximum power transfer efficiency of a DC system, and why is this condition not utilized in electrical power utility distribution?

Answer: The maximum power transfer efficiency is exactly 50%50\% because half of the total power is dissipated internally across the source's internal resistance (RsourceR_{source} or RthR_{th}). Power utility grids cannot operate at 50%50\% efficiency because dissipating half the generated gigawatts as heat in power stations and transmission lines would cause catastrophic equipment meltdown and massive financial loss. Utility grids operate with low generator/transmission impedance (Rsource≪RLR_{source} \ll R_L) to achieve efficiencies greater than 95%95\%.

Q7: If a 4-band resistor has color bands Yellow, Violet, Orange, Gold, what is its nominal value and acceptable tolerance range?

Answer:

  • Yellow = 4, Violet = 7, Orange = Multiplier 103=100010^3 = 1000, Gold = Tolerance ±5%\pm 5\%.
  • Nominal Value: 47×103=47,000 Ω=47 kΩ47 \times 10^3 = 47,000\,\Omega = 47\text{ k}\Omega.
  • ±5%\pm 5\% of 47 kΩ=2.35 kΩ47\text{ k}\Omega = 2.35\text{ k}\Omega.
  • Acceptable Range: 47−2.35=44.65 kΩ47 - 2.35 = 44.65\text{ k}\Omega to 47+2.35=49.35 kΩ47 + 2.35 = 49.35\text{ k}\Omega.

Q8: Under what conditions does Norton's theorem fail or become inapplicable?

Answer: Norton's theorem is strictly applicable only to linear bilateral networks. It fails if the circuit contains non-linear components (such as forward-biased semiconductor diodes, transistors operating over wide non-linear excursions, or varistors) or time-varying elements. Furthermore, Norton's equivalent cannot be formulated directly if the two terminals are connected directly across an ideal independent voltage source with zero series impedance (since Isc→∞I_{sc} \to \infty).

Q9: What is the physical significance of the Dual In-line Package (DIP) center trough on a breadboard?

Answer: The center trough provides complete electrical isolation between the top five-hole vertical terminal strips and the bottom five-hole vertical terminal strips. This 0.3-inch isolation gap allows standard DIP integrated circuits (ICs) to be straddled across the center so that opposing IC pins (e.g., Pin 1 and Pin 14) are not shorted together.

Q10: How does AC coupling differ from DC coupling on an oscilloscope channel?

Answer:

  • DC Coupling: Passes the entire input signal directly to the vertical amplifier, displaying both the DC bias offset and the time-varying AC ripple simultaneously.
  • AC Coupling: Inserts a series DC-blocking capacitor into the signal path. This eliminates any static DC voltage offset, allowing low-amplitude AC waveforms riding on large DC voltages (such as power supply ripple) to be magnified on sensitive vertical volt/div scales without driving the waveform off-screen.

Q11: What is a current shunt, and how does a digital multimeter measure current?

Answer: A current shunt is a high-precision, low-value resistor (typically 0.01 Ω0.01\,\Omega to 1 Ω1\,\Omega) placed in series with the current path inside the meter. As current traverses the shunt, it produces a proportional millivolt drop (V=I⋅RshuntV = I \cdot R_{shunt}). The meter's internal analog-to-digital converter (ADC) samples this small voltage drop and scales it mathematically to display current in amperes.

Q12: Why does an ohmmeter read infinite resistance (∞\infty or O.L.) when measuring a good diode in reverse bias?

Answer: In reverse bias, the external voltage applied by the ohmmeter widens the diode's depletion layer, preventing majority carrier diffusion. Only a tiny minority carrier reverse saturation current (Is≈nAI_s \approx \text{nA} to pA\text{pA}) flows. This minuscule current corresponds to an effective reverse resistance on the order of megaohms to gigaohms, which exceeds the measurement range of the DMM, registering as open line (O.L.).

Q13: State the relationship between Thevenin voltage VthV_{th}, Norton current INI_N, and Thevenin resistance RthR_{th}.

Answer: They are related via source transformation and Ohm's law:
Vth=IN⋅Rth  ⟺  IN=VthRth  ⟺  Rth=RN=VthIN=VocIscV_{th} = I_N \cdot R_{th} \quad \iff \quad I_N = \frac{V_{th}}{R_{th}} \quad \iff \quad R_{th} = R_N = \frac{V_{th}}{I_N} = \frac{V_{oc}}{I_{sc}}

Q14: How does temperature affect the resistance of metallic conductors versus semiconductor materials?

Answer:

  • Metallic conductors possess a Positive Temperature Coefficient (PTC) of resistance. As temperature rises, lattice vibrations increase, causing more frequent collisions with conduction electrons and increasing resistance (R(T)=R0[1+α(T−T0)]R(T) = R_0[1 + \alpha(T - T_0)]).
  • Intrinsic semiconductors possess a Negative Temperature Coefficient (NTC) of resistance. Increasing temperature provides thermal energy that breaks covalent bonds, exponentially generating electron-hole pairs that drastically lower resistance.

Q15: What is the function of the "Level" knob on an oscilloscope trigger control panel?

Answer: The trigger level control sets the exact voltage threshold that the input signal must cross (in either a positive-going or negative-going direction, as set by trigger slope) to initiate the horizontal sweep. Proper trigger adjustment stabilizes repetitive waveforms on the display, preventing the trace from rolling or jittering horizontally.

Q16: Why must a circuit with dependent sources be handled differently when finding Thevenin resistance RthR_{th}?

Answer: When finding RthR_{th}, only independent sources are turned off (voltage sources shorted, current sources opened). Dependent (controlled) sources cannot be turned off because their excitation depends on internal circuit voltages or currents. To find RthR_{th} in such circuits, one must either calculate the ratio Rth=Voc/IscR_{th} = V_{oc} / I_{sc} or apply an external test voltage source (VtestV_{test}) at the terminals and compute Rth=Vtest/ItestR_{th} = V_{test} / I_{test}.

Q17: What does the tolerance band on a carbon film resistor signify?

Answer: The tolerance band specifies the manufacturer's guaranteed maximum percentage deviation of the actual measured resistance from the nominal color-coded value at standard room temperature (25∘C25^\circ\text{C}). For example, a 100 Ω100\,\Omega resistor with a gold band (±5%\pm 5\%) is guaranteed to measure between 95 Ω95\,\Omega and 105 Ω105\,\Omega.

Q18: What is the purpose of the ground clip on a standard oscilloscope 10X passive probe?

Answer: The alligator ground clip connects the outer shield of the coaxial probe cable to the oscilloscope's chassis ground, establishing an earth-referenced return path. If the ground clip is omitted, stray capacitive coupling and ambient electromagnetic interference distort the measured waveform, and loop currents can induce severe high-frequency ringing.

Q19: What is the 10X attenuation setting on an oscilloscope probe, and why is it preferred over a 1X probe?

Answer: A 10X probe contains an internal 9 MΩ9\text{ M}\Omega resistor in parallel with a compensating capacitor. In conjunction with the oscilloscope's 1 MΩ1\text{ M}\Omega input resistance, it attenuates the incoming signal voltage by a factor of 10 while increasing the effective input impedance from 1 MΩ1\text{ M}\Omega to 10 MΩ10\text{ M}\Omega and reducing input capacitance (e.g., from 100 pF100\text{ pF} to 10−15 pF10-15\text{ pF}). This dramatically reduces capacitive and resistive circuit loading at high frequencies.

Q20: What is the significance of the "Constant Current" (CC) indicator lighting up on a DC bench power supply?

Answer: The CC indicator illuminates when the load demands more current than the user-set current limit threshold. The power supply automatically transitions from Constant Voltage (CV) mode to Constant Current (CC) mode by dynamically decreasing its output voltage to clamp the output current at the preset limit, protecting external circuit components from overcurrent damage.

Q21: In a bridge circuit, when is the bridge said to be balanced?

Answer: A resistive bridge (such as a Wheatstone bridge) is balanced when the potential difference between its two intermediate detection terminals is zero (Vdetector=0V_{detector} = 0). For bridge arms R1,R2,R3,R4R_1, R_2, R_3, R_4, this occurs when the ratio of adjacent branch resistances is equal:
R1R2=R3R4  ⟹  R1⋅R4=R2⋅R3\frac{R_1}{R_2} = \frac{R_3}{R_4} \implies R_1 \cdot R_4 = R_2 \cdot R_3

Q22: What is the burden voltage of an ammeter?

Answer: The burden voltage is the voltage drop that appears across the input terminals of an ammeter when full-scale current flows through its internal shunt resistance (Vburden=Iin⋅RshuntV_{burden} = I_{in} \cdot R_{shunt}). In low-voltage circuits (e.g., 1.8 V1.8\text{ V} logic), a burden voltage of 200−500 mV200-500\text{ mV} significantly alters the circuit's operating point, causing large current measurement errors.

Q23: Why do we calibrate an oscilloscope probe using the 1 kHz1\text{ kHz} square wave test terminal on the scope front panel?

Answer: The probe's internal adjustable trimmer capacitor forms a frequency-compensated voltage divider with the scope's input capacitance. Calibrating against a sharp 1 kHz1\text{ kHz} square wave ensures that the capacitive voltage divider ratio matches the resistive 10:1 ratio across all frequency components. Improper compensation causes overshoot (overcompensation) or rounded edges (undercompensation), distorting pulse measurements.

Q24: What is meant by the RMS value of an alternating electrical quantity?

Answer: The Root Mean Square (RMS) or effective value of an alternating current/voltage represents the equivalent steady DC value that produces the identical rate of electrical energy dissipation (heating effect) in a given resistive load over a complete cycle:
Irms=1T∫0Ti2(t) dtI_{rms} = \sqrt{\frac{1}{T}\int_0^T i^2(t)\,dt}
For a pure sinusoidal wave, Irms=Ipeak/2≈0.707⋅IpeakI_{rms} = I_{peak} / \sqrt{2} \approx 0.707 \cdot I_{peak}.

Q25: What is the distinction between independent and dependent electrical sources?

Answer:

  • An independent source (voltage or current) maintains its terminal characteristic completely autonomously, regardless of voltages or currents existing elsewhere in the surrounding network.
  • A dependent (controlled) source has its terminal output value governed mathematically by a specific control voltage or control current located in another branch of the network (e.g., VCVS, VCCS, CCVS, CCCS, as found in transistor small-signal equivalent models).
Table of Contents
1. Laboratory Safety, Orientation & Instrumentation Fundamentals1.1 Laboratory Safety Guidelines & Electrical Hazards1.2 Benchtop Test and Measuring Instruments1.3 Solderless Breadboard Architecture & Prototyping Rules1.4 Resistor Color Coding Systems2. Experiment 1: Verification of Ohm's Law2.1 Aim2.2 Theoretical Foundation2.3 Apparatus Required2.4 Circuit Schematic Diagram2.5 Experimental Procedure2.6 Observation and Data Table2.7 Calculations and Result3. Experiment 2: Verification of Kirchhoff's Current Law (KCL)3.1 Aim3.2 Theoretical Foundation3.3 Apparatus Required3.4 Circuit Schematic Diagram3.5 Experimental Procedure3.6 Observation and Analysis Table3.7 Analytical Verification & Percentage Error4. Experiment 3: Verification of Kirchhoff's Voltage Law (KVL)4.1 Aim4.2 Theoretical Foundation4.3 Apparatus Required4.4 Circuit Schematic Diagram4.5 Experimental Procedure4.6 Observation Table4.7 Mathematical Validation5. Experiment 4: Experimental Verification of Thevenin's Theorem5.1 Aim5.2 Theoretical Foundation5.3 Laboratory Network Specification5.4 Theoretical Calculation of $V_{th}$ and $R_{th}$5.5 Experimental Procedure5.6 Observation and Comparison Table6. Experiment 5: Experimental Verification of Norton's Theorem6.1 Aim6.2 Theoretical Foundation6.3 Theoretical Calculation (Using Network from Experiment 4)6.4 Experimental Procedure6.5 Observation and Data Table7. Experiment 6: Verification of Maximum Power Transfer Theorem7.1 Aim7.2 Theoretical Foundation7.3 Experimental Setup7.4 Experimental Procedure7.5 Observation Table7.6 Power Curve Plot Interpretation8. Laboratory Measurement Errors & Instrumental Uncertainty Analysis8.1 Error Classification8.2 Standard Error Quantification Formulas9. Comprehensive Viva Voce Questions & AnswersQ1: Why must an ammeter always be connected in series and never in parallel?Q2: What is meant by the "loading effect" of a voltmeter, and how can it be minimized?Q3: Explain why a digital multimeter cannot measure resistance in an energized circuit.Q4: State the fundamental conservation laws that underpin Kirchhoff's Current Law and Kirchhoff's Voltage Law.Q5: How do you determine the internal resistance $R_{th}$ of an active circuit without turning off or modifying the internal circuit?Q6: What is the maximum power transfer efficiency of a DC system, and why is this condition not utilized in electrical power utility distribution?Q7: If a 4-band resistor has color bands Yellow, Violet, Orange, Gold, what is its nominal value and acceptable tolerance range?Q8: Under what conditions does Norton's theorem fail or become inapplicable?Q9: What is the physical significance of the Dual In-line Package (DIP) center trough on a breadboard?Q10: How does AC coupling differ from DC coupling on an oscilloscope channel?Q11: What is a current shunt, and how does a digital multimeter measure current?Q12: Why does an ohmmeter read infinite resistance ($\infty$ or O.L.) when measuring a good diode in reverse bias?Q13: State the relationship between Thevenin voltage $V_{th}$, Norton current $I_N$, and Thevenin resistance $R_{th}$.Q14: How does temperature affect the resistance of metallic conductors versus semiconductor materials?Q15: What is the function of the "Level" knob on an oscilloscope trigger control panel?Q16: Why must a circuit with dependent sources be handled differently when finding Thevenin resistance $R_{th}$?Q17: What does the tolerance band on a carbon film resistor signify?Q18: What is the purpose of the ground clip on a standard oscilloscope 10X passive probe?Q19: What is the 10X attenuation setting on an oscilloscope probe, and why is it preferred over a 1X probe?Q20: What is the significance of the "Constant Current" (CC) indicator lighting up on a DC bench power supply?Q21: In a bridge circuit, when is the bridge said to be balanced?Q22: What is the burden voltage of an ammeter?Q23: Why do we calibrate an oscilloscope probe using the $1\text{ kHz}$ square wave test terminal on the scope front panel?Q24: What is meant by the RMS value of an alternating electrical quantity?Q25: What is the distinction between independent and dependent electrical sources?
Unit 178 Sections
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